Effect of oxide and W-CMP on the material properties and electromigration behaviour of layered aluminum metallisations

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It has been found that chemical mechanical polishing increases the electromigration resistance of a Ti/AlCu/Ti/TiN metal stack. (111) X-ray diffraction polefigures indicate an increased (111) texture of AlCu deposited on a substrate that received at
  See discussions, stats, and author profiles for this publication at:https://www.researchgate.net/publication/245128157 Effect of oxide and W-CMP on the materialproperties and electromigration behaviourof layered aluminum metallisations  Article   in  Microelectronic Engineering · January 2000 DOI: 10.1016/S0167-9317(99)00295-6 CITATIONS 7 READS 30 7 authors , including: Some of the authors of this publication are also working on these related projects: Precision Additive Metal Manufacturing (PAM^2)   View projectMarleen Emma Van HoveIMEC International 229   PUBLICATIONS   1,903   CITATIONS   SEE PROFILE A. WitvrouwUniversity of Leuven 184   PUBLICATIONS   1,571   CITATIONS   SEE PROFILE P. RousselIMEC International 148   PUBLICATIONS   2,509   CITATIONS   SEE PROFILE Hugo BenderIMEC International 515   PUBLICATIONS   5,281   CITATIONS   SEE PROFILE All content following this page was uploaded by P. Roussel on 26 June 2014. The user has requested enhancement of the downloaded file. All in-text references underlined in blue are added to the srcinal documentand are linked to publications on ResearchGate, letting you access and read them immediately.  Microelectronic Engineering 50 (2000) 291–299 www.elsevier.nl/locate/mee Effect of oxide and W-CMP on the material properties andelectromigration behaviour of layered aluminum metallisations a, a a a,b c a *I. Heyvaert , M. Van Hove , A. Witvrouw , K. Maex , A. Saerens , P. Roussel , a H. Bender a  IMEC Kapeldreef   75,  B - 3001  Leuven ,  Belgium b  INSYS  ,  K  . U  .  Leuven ,  B - 3001  Leuven Belgium c  MTM  ,  K  . U  .  Leuven ,  de Croylaan  2,  B - 3001  Leuven ,  Belgium Abstract It has been found that chemical mechanical polishing increases the electromigration resistance of a Ti/AlCu/Ti/TiN metalstack. (111) X-ray diffraction polefigures indicate an increased (111) texture of AlCu deposited on a substrate that receivedat least one CMP step. This improved (111) texture can be attributed to a decreased roughness of the underlying oxide whenchemical mechanical polishing is used.  ©  2000 Elsevier Science B.V. All rights reserved. Keywords :   Texture; Aluminum; Metallisation; Oxide CMP; W-CMP; Electromigration; Reliability 1. Introduction A major concern with the increasing packing density of large-scale integrated circuits is to obtainfine interconnects with high reliability. There are, however, many factors affecting the interconnectreliability. It has been recognised that there is a strong correlation between the microstructure and theelectromigration lifetime of metal interconnects. An increased (111) texture of the metal normallyreflects itself in an increased electromigration lifetime [1–5]. An important factor determining thecrystallographic texture of Ti and Ti/AlCu films is the roughness of the underlying substrate [4,6].This substrate roughness can be affected by a surface treatment with chemical mechanical polishing(CMP). In this paper, the influence of oxide and W-CMP on the electromigration behaviour and thefilm properties of a Ti/AlCu/Ti/TiN metal stack are studied. 2. Material Wafers with plasma-enhanced chemical vapour deposition (PECVD) oxide were prepared without *Corresponding author.0167-9317/00/$ – see front matter  ©  2000 Elsevier Science B.V. All rights reserved.PII: S0167-9317(99)00295-6  292  I  .  Heyvaert et al .  /   Microelectronic Engineering  50 (2000) 291 – 299  CMP, with oxide CMP only, with W-CMP only, and with combined oxide and W-CMP. The oxideCMP was done with an ILD1300 slurry (Rodel) and an IC1400 pad (Rodel). For the W-CMP, a600-nm thick W layer is deposited on the oxide, which is then completely removed by the subsequentCMP step with an SSW2000 slurry (Cabott) and an IC1000/SUBA IVpad (Cabott). On these wafers, ] a Ti(20 nm)/AlCu(690 nm)/Ti(20 nm)/TiN(60 nm) metal stack was sputter deposited with a 450 8 Cdeposition temperature for AlCu (0.5 wt% Cu). Half of the wafers were used for materialcharacterisation, the other half were patterned for the electromigration test. Identical oxide waferswithout a metal stack were measured with AFM in order to study the surface topography androughness of the underlying substrate. 3. Electromigration lifetime To determine the electromigration resistance of the AlCu, an isocurrent test, i.e. a highlyaccelerated wafer-level electromigration test, was used [7]. In the isocurrent test, high currentdensities are used to provide both the current and the temperature stress to the line. The current ischosen such that the test temperature for all tested lines is equal. This current is determined for eachline individually before the actual test by measuring the dependence of the line resistance on thecurrent. This last relation together with the knowledge of the temperature coefficient of resistance,which is determined beforehand, allows the calculation of the exact current to use. This constantcurrent  I   flows through the test structure while the resistance of the line is monitored. The failurecriterion used is a 100% resistance increase at the test temperature. The obtained failure times areplotted in a log-normal plot and the median time to failure (MTTF) and the deviation time to failure(DTTF) are determined [8]. In order to compare the MTTF of different lines tested at equaltemperatures, but with different current densities, the effective MTTF (MTTF ) is calculated at a eff  common current density from Black’s equation:  E  a ] S D 2 nk T  MTTF 5  Aj  3 e (1) * with  n  the current density exponent,  E   the activation energy,  j  the current density,  T   the test a temperature,  A  a parameter depending on the characteristics of the film, and  k   the Boltzman constant.In this case, the isocurrent lifetime was determined for 1- and 1.5- m m wide, 2-mm long lines,connected to bonding pads by tapered end segments [7], at a test temperature of 300 8 C. Failure inthese lines is random in position and, therefore, also representative for the reliability of theinvestigated microstructure. Table 1 gives an overview of the results for the different splits. For both 2 line widths, the raw data (MTTF and DTTF) and the calculated MTTF at  j 5 2E7 A/cm are listed. eff  For the latter, an effective current density exponent of 2 is assumed to convert the data obtained underthe isocurrent current density, calculated from the average current and the real line width, to theeffective MTTF data. For some tests, no absolute values for the MTTF could be determined as notenough lines failed before the 15 min timeout. In that case, only a lower limit for the MTTF is known,which is then indicated in Table 1. Clearly, the worst lifetimes are obtained on the wafer without anyCMP steps. Both oxide and W-CMP result in higher isocurrent lifetimes, with W-CMP being moreeffective than oxide CMP. When compared to wafers without CMP, the effective MTTF for both line   I  .  Heyvaert et al .  /   Microelectronic Engineering  50 (2000) 291 – 299   293Table 1Results of the isocurrent test at 300 8 C on 1- and 1.5- m m wide and 2-mm long metal linesCMP on wafer Oxide Oxide 1 W W –MTTF 1  m m (s) 530 ( 1 83/  2 72) 1100 ( 1 170/  2 120)  . 899 280 ( 1 33/  2 30)DTTF 1  m m 0.32 0.17 – 0.25MTTF 1  m m (s) 134 ( 1 21/  2 18) 308 ( 1 47/  2 34)  . 254 76 ( 1 9/  2 8) eff. MTTF 1.5  m m (s) 868 ( 1 89/  2 79)  . 899  . 899 440 ( 1 60/  2 53)DTTF 1.5  m m 0.20 – – 0.28MTTF 1.5 m m (s) 186 1 20/  2 16  . 209  . 217 101 1 14/  2 12 eff. widths is at least two times larger when W-CMP is used and almost two times larger when oxide CMPonly is used. 4. Material characterisation In order to reveal the underlying reason for the higher isocurrent lifetime, material characterisationof unpatterned metal stacks was performed: the resistance and reflectivity were measured, focussed Table 2Four-point resistance and reflectivity with respect to a silicon wafer at 480 nm of metal stacks deposited on oxide layers withand without CMP stepsCMP on wafer Oxide Oxide 1 W W –Reflectivity (%) 30.05 30.92 30.74 17.18Resistance (m V ) 54.17 53.55 53.57 57.32Fig. 1. FIB images of a metal stack without Ti/TiN top layer (a) on a wafer without CMP and (b) on a wafer with bothoxide and W-CMP.  294  I  .  Heyvaert et al .  /   Microelectronic Engineering  50 (2000) 291 – 299  Fig. 2. AFM images of a metal stack (a) on a wafer without CMP and (b) on a wafer with both oxide and W-CMP. The  z -scale in both images is the same, illustrating the difference in surface roughness between the two wafers.
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